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		<title>TechOnLine.com - Feature Articles</title>
		<link>http://www.techonline.com</link>
		<description>The latest electronics engineering technical articles and commentaries exclusive to TechOnLine</description>
		<language>en-us</language>
		<copyright>Copyright 2008 TechInsights, a Division of United Business Media LLC. All rights reserved.</copyright>
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		<ttl>15</ttl>
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			<title><![CDATA[A cabling approach for HDMI interfaces in control apps]]></title>
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			<pheedo:origLink>http://www.industrialcontroldesignline.com/howto/221900473</pheedo:origLink>
			<description><![CDATA[Although HDMI was developed for consumer electronics applications, it can be made reliable for use in a professional environment. This opens the possibility of using the control channels in new ways.  
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			<title><![CDATA[Presented By: NEC]]></title>
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<tr><td>&nbsp;</td></tr>
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			<title><![CDATA[Advanced metering:  ecosystem, security threats and countermeasures]]></title>
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			<pheedo:origLink>http://www.powermanagementdesignline.com/howto/221900288</pheedo:origLink>
			<description><![CDATA[Known vulnerabilities in metering systems must be mitigated in order to increase the security and success of the Smart Grid. <br clear="both" style="clear: both;"/>
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			<title><![CDATA[Advanced metering:  ecosystem, security threats and countermeasures]]></title>
			<link><![CDATA[http://www.pheedcontent.com/click.phdo?i=295ffae5f317ae49319107e94dfc4df0]]></link>
			<pheedo:origLink>http://www.industrialcontroldesignline.com/howto/221900189</pheedo:origLink>
			<description><![CDATA[Known vulnerabilities in metering systems must be mitigated in order to increase the security and success of the Smart Grid. <br clear="both" style="clear: both;"/>
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			<title><![CDATA[High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems ]]></title>
			<link><![CDATA[http://www.pheedcontent.com/click.phdo?i=5352459a3a06f388f79518e67e6f7f60]]></link>
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			<description><![CDATA[Many video systems are implemented with feature-rich FPGA and multi-rate SDI integrated circuits that support high performance professional video transport over long distances. But FPGAs demand high density routing with fine trace width while high-speed analog SDI routing demands impedance matching and signal fidelity. This paper outlines the layout challenges facing hardware engineers and provides recommendations for dealing with these challenges.<br clear="both" style="clear: both;"/>
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			<title><![CDATA[High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems ]]></title>
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			<description><![CDATA[Many video systems are implemented with feature-rich FPGA and multi-rate SDI integrated circuits that support high performance professional video transport over long distances. But FPGAs demand high density routing with fine trace width while high-speed analog SDI routing demands impedance matching and signal fidelity. This paper outlines the layout challenges facing hardware engineers and provides recommendations for dealing with these challenges.<br clear="both" style="clear: both;"/>
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<hr />
<div style="font-size:xx-small;color:gray;padding-bottom:.5em">Presented By:</div>
<div><a href="http://ads.pheedo.com/feeds/ht.php?t=c&amp;i=e48d28288be639a1f75b1b0623f8f1f6&amp;p=1">NEC</a></div>
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<tr><td>&nbsp;</td></tr>
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			<title><![CDATA[High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems ]]></title>
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			<description><![CDATA[Many video systems are implemented with feature-rich FPGA and multi-rate SDI integrated circuits that support high performance professional video transport over long distances. But FPGAs demand high density routing with fine trace width while high-speed analog SDI routing demands impedance matching and signal fidelity. This paper outlines the layout challenges facing hardware engineers and provides recommendations for dealing with these challenges.<br clear="both" style="clear: both;"/>
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			<title><![CDATA[Multi-pronged approach reduces carbon dioxide emissions]]></title>
			<link><![CDATA[http://www.pheedcontent.com/click.phdo?i=9e5c5aa920bb63156a3e365cfb62c71b]]></link>
			<pheedo:origLink>http://www.automotivedesignline.com/howto/221900099</pheedo:origLink>
			<description><![CDATA[In order to significantly reduce the CO&lt;sub&gt;2&lt;/sub&gt; emission of a car, it is not sufficient to attack at one single point. In contrast, it is necessary to use a combination of more efficient drives, electrification, assistance systems and maximum driver integration. Continental explains its integrated system approach to make engines and vehicles more economical.<br clear="both" style="clear: both;"/>
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			<description><![CDATA[Richard Lyons, author of &quot;Digital Signal Processing,&quot; describes way to reduce the number of multipliers in a linear phase FIR filter with an odd number of taps.<br clear="both" style="clear: both;"/>
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			<title><![CDATA[DSP Tricks: An odd way to build a simplified FIR filter structure]]></title>
			<link><![CDATA[http://www.pheedcontent.com/click.phdo?i=e8750d7ac8dbe3552f0c5d22ff19ee63]]></link>
			<pheedo:origLink>http://www.embedded.com/showArticle.jhtml?articleID=221800456</pheedo:origLink>
			<description><![CDATA[Richard Lyons, author of &quot;Digital Signal Processing,&quot; describes way to reduce the number of multipliers in a linear phase FIR filter with an odd number of taps.<br clear="both" style="clear: both;"/>
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<div style="font-size:xx-small;color:gray;padding-bottom:.5em">Presented By:</div>
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			<title><![CDATA[PRODUCT HOW-TO: Dial tone detector based on monobit periodograms]]></title>
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			<description><![CDATA[The implementation of a complex correlation algorithm on a Freescal Starcore DSP for international dial tone detection with special focus on computational load and memory requirements.<br clear="both" style="clear: both;"/>
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			<title><![CDATA[PRODUCT HOW-TO: Dial tone detector based on monobit periodograms]]></title>
			<link><![CDATA[http://www.pheedcontent.com/click.phdo?i=78fa0e232524a52205a5a44677be4c1b]]></link>
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			<description><![CDATA[The implementation of a complex correlation algorithm on a Freescal Starcore DSP for international dial tone detection with special focus on computational load and memory requirements.<br clear="both" style="clear: both;"/>
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			<title><![CDATA[DSP Tricks: Frequency Domain Windowing]]></title>
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			<description><![CDATA[Richard Lyons, author of &quot;Digital Signal Processing,&quot; describes a number of ways to implement windowing of FFT data using Hanning, Hamming and Blackman window techniques.<br clear="both" style="clear: both;"/>
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			<description><![CDATA[Richard Lyons, author of &quot;Digital Signal Processing,&quot; describes a number of ways to implement windowing of FFT data using Hanning, Hamming and Blackman window techniques.<br clear="both" style="clear: both;"/>
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			<title><![CDATA[DSP Tricks: Sharpening Your FIR Filters]]></title>
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			<pheedo:origLink>http://www.embedded.com/showArticle.jhtml?articleID=221800231</pheedo:origLink>
			<description><![CDATA[Richard Lyons, author of &quot;Digital Signal Processing,&quot; describes a couple of techniques for improving the stopband attenuation of a digital filter.<br clear="both" style="clear: both;"/>
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